Digital architectures for computing and information processing

Lecturer(s): Ian O CONNOR
Course ⋅ 18 hTC ⋅ 10 hPW ⋅ 8 hAutonomy ⋅ 12 h


This course aims to study the hardware operation of digital electronic architectures for computing and information processing. It presents the components that are systematically present in digital architectures: control, data path and memory. The first part of the course will analyze the internal architecture of processors and the way in which they execute software instructions. The second part will focus on how (through the organization of the components) it is possible to improve the performance of the processor.

Palabras clave

Processors, datapath, software instructions, memory, pipeline architectures, cache memory


Architectural principles: von Neumann and (modified) Harvard, RISC, CISC Datapath design, control and instruction flow Instruction sets, memory, addressing types Computing machine benchmarking. Performance acceleration techniques: Pipeline, Cache memory

Learning Outcomes

  • Understand how a processor works
  • Understand how processor hardware is programmed
  • Understand the main performance metrics and parameters of architectures (memory footprint, speed, energy consumption)
  • Know the main techniques to accelerate processor performance


Final mark = 50% Knowledge + 50% Know-how Knowledge mark = 100% final exam Know-how mark = 50% TP1 report + 50%TP2 report